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Board Technical Information
A.2.1
Device-Specific LCD Segment Configuration
The following figures and tables detail which segments are available for specific
PIC ? devices.
TABLE A-4:
PIC18F85J90 PIM AND ICE PIN/PORT COMPARISON
PIC18F85J90 PIC18F85J90 PIC18F85J90
PIM Pin No. Port Pin
ICE Pin
ICE
Port
ICE
Pin
No.
PIC18F85J90 PIC18F85J90 PIC18F85J90
PIM Pin No. Port Pin
ICE Pin
ICE
Port
ICE
Pin
No.
1
2
3
4
5
6
7
8
RH2
RH3
RE1
RE0
RG0
RG1
RG2
RG3
SEG45
SEG44
BIAS2
BIAS1
BIAS0
NC
VLCAP1
VLCAP2
SEG30
SEG29
BIAS2
BIAS1
BIAS0
NC
VLCAP1
VLCAP2
RG0
RG1
RE1
RE0
RB5
RC3
RC4
16
17
14
15
67
57
58
41
42
43
44
45
46
47
48
RJ6
RJ7
RC2
RC3
RC4
RC5
RB7
V DD
SEG37
SEG36
SEG13
SEG17
SEG16
SEG12
RB7
ICEV DD
SEG37
SEG36
SEG13
SEG17
SEG16
SEG12
RB7
ICEV DD
RJ6
RJ7
RC2
RA3
RA2
RC5
RB7
V DD
54
55
56
39
40
59
60
61
9
RG5
MCLR
ICEMCLR RG5
20
49
RA7
OSC1
OSC1
RA7
62
10
11
12
13
14
15
16
17
18
19
20
21
22
23
RG4
V SS
V DDCORE
RF7
RF6
RF5
RF4
RF3
RF2
RH7
RH6
RH5
RH4
RF1
SEG26
V SS
V DDCORE
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG43
SEG42
SEG41
SEG40
SEG19
SEG26
V SS
V DD
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG43
SEG42
SEG41
SEG40
SEG19
RG4
V SS
V DD
RF7
RF6
RF5
RF4
RF3
RF2
RH7
RH6
RH5
RH4
RF1
21
23
24
25
26
27
28
29
30
31
32
33
34
35
50
51
52
53
54
55
56
57
58
59
60
61
62
63
RA6
V SS
RB6
RB5
RB4
RB3
RB2
RB1
RB0
RJ3
RJ2
RJ1
RJ0
RD7
OSC2
V SS
RB6
SEG29
SEG11
SEG10
SEG9
SEG8
RB0
SEG35
SEG34
SEG33
NC
SEG7
OSC2
V SS
RB6
SEG27
SEG11
SEG10
SEG9
SEG8
RB0
SEG35
SEG34
SEG33
NC
SEG7
RA6
V SS
RB6
RG3
RB4
RB3
RB2
RB1
RB0
RJ3
RJ2
RJ1
RD7
63
65
66
19
68
69
70
71
72
73
74
75
77
24
ENVREG
ENVREG
64
RD6
SEG6
SEG6
RD6
78
25
26
27
AV DD
AV SS
RA3
AV DD
AV SS
NC
ICEV DD
AV SS
NC
AV DD 37
AV SS 38
65
66
67
RD5
RD4
RD3
SEG5
SEG4
SEG3
SEG5
SEG4
SEG3
RD5
RD4
RD3
79
80
81
28
29
30
31
32
33
34
35
RA2
RA1
RA0
V SS
V DD
RA5
RA4
RC1
AN2
SEG18
AN0
V SS
ICEV DD
SEG15
SEG14
T1OSCI
AN1
SEG18
AN0
V SS
ICEV DD
SEG15
SEG14
T1OSCI
RA1
RF0
RA0
V SS
V DD
RA5
RA4
RC1
41
36
42
44
45
46
47
48
68
69
70
71
72
73
74
75
RD2
RD1
V SS
V DD
RD0
RE7
RE6
RE5
SEG2
SEG1
V SS
V DD
SEG0
SEG31
COM3
COM2
SEG2
SEG1
V SS
V DD
SEG0
SEG28
COM3
COM2
RD2
RD1
V SS
V DD
RD0
RG2
RE6
RE5
82
83
84
2
3
18
5
6
36
RC0
T1OSCO
T1OSCO RC0
49
76
RE4
COM1
COM1
RE4
7
37
RC6
TX/CK
TX/CK
RC6
50
77
RE3
COM0
COM0 COM0
8
38
39
40
RC7
RJ4
RJ5
RX/DT
SEG39
SEG38
RX/DT
SEG39
SEG38
RC7
RJ4
RJ5
51
52
53
78
79
80
RE2
RH0
RH1
BIAS3
SEG47
SEG46
BIAS3
SEG32
SEG31
RE2
RJ0
RE7
9
76
4
Legend:
Unshaded cells indicate where a perfect match between PIM and ICE pins and ports exists.
Shaded cells indicate where differences between PIM and ICE ports and pins exist.
Bold text indicates the PIM pins that are not connected to any ICE pins or ports.
? 2010 Microchip Technology Inc.
DS51662C-page 29
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